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demultiplexer

 library ieee;

use ieee.std_logic_1164.all;

entity dmux1 is

port(z:in std_logic; control :in std_logic_vector(1 downto 0); y:out

std_logic_vector(3 downto 0));

end dmux1;

architecture a_dmux1 of dmux1 is

begin

process(control)


begin

case control is

when "00" => y<=z&"000";

when "01" => y<="0"&z&"00";

when "10" => y<="00"&z&"0";

when "11" => y<="000"&z;

when others => null;

end case;

end process;

end a_dmux1;

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